Quantum technologies, QPUs, FPQAs, QNNs // simulations, measurement & control
The Japanese government’s Moonshot program 2050 and many more initiatives..
FPGA is the most efficient technology for quantum processes simulations, measurement & control
The document discusses field-programmable qubit arrays (FPQAs), which are a revolutionary development in quantum computing similar to how field-programmable gate arrays (FPGAs) revolutionized electronic design in the 1980s. FPQAs allow quantum algorithm designers to adjust the layout and connectivity of qubits (quantum bits) in a quantum processor according to their needs, optimizing the processor for specific applications and achieving better performance with limited quantum resources.
FPQAs work by leveraging the unique control mechanism of neutral-atom quantum computers, where focused laser beams trap and rearrange the position of atoms in space, effectively programming the qubit connectivity. This programmability enables efficient mapping of problems onto the quantum processor, reducing qubit and gate overhead.
The article highlights the potential benefits of FPQAs in various domains, such as optimization problems (e.g., 5G tower placement, stock correlation), quantum simulation (e.g., materials science, high-energy physics), and dynamic performance optimization (e.g., real-time routing for autonomous robots). FPQAs can create a customized quantum processor for each calculation and even update the processor layout during computation, enabling more efficient use of quantum resources and accelerating the path to useful quantum computers.
The neutral atom array has gained prominence in quantum computing for its scalability and operation fidelity. Previous works focus on fixed atom arrays (FAA) that necessitate extensive SWAP operations for long-range interactions. This work explores a novel architecture known as field programmable qubit array (FPQA), which uniquely allows for coherent atom movements during circuit execution and significantly reduces the cost of long-range interactions. However, the atom movements have multiple hardware constraints, e.g. overlap or position swap of two atom rows/columns are not allowed, making movement scheduling very challenging. In this work, we introduce FPQA-C, a compilation framework tailored for qubit mapping, atom movement, and gate scheduling of FPQA. It contains a qubit-array mapper to decide the coarsegrained mapping of qubit to arrays, leveraging MAX k-Cut on a constructed gate frequency graph to minimize SWAP overhead. Subsequently, a qubit-atom mapper determines the fine-grained mapping of qubits to specific atoms in the array, and considers load balance to prevent hardware constraint violations. We further propose a high-parallelism router that iteratively identifies parallelizable 2Q gates and decide the atom movements and gate executions, thus improving the parallelism. Besides, for faulttolerant computing with FPQA, we provide comprehensive simulations evaluating logical error rates, execution times, physical qubit requirements, code distances, and bandwidth. We rigorously assess FPQA-C across 20+ diverse benchmarks, including generic circuits (arbitrary, QASMBench, SupermarQ), Quantum Simulation, and QAOA circuits. FPQA-C consistently outperforms the IBM Superconducting, FAA with long-range gates, FAA with rectangular and triangular topologies, achieving 2Q gate reductions by factors of 5.3×, 3.2×, 3.4×, and 2.6×, and circuit depth reductions by factors of 3.6×, 3.2×, 3.1×, and 2.2×, respectively.
This paper introduces FPQA-C, a compilation framework for the emerging Field Programmable Qubit Array (FPQA) architecture for quantum computing. The key contributions are:
1. Describing the FPQA architecture which utilizes movable neutral atom arrays along with a fixed atom array, enabling dynamic qubit coupling and efficient long-range interactions.
2. Proposing a two-tier hierarchical qubit mapping strategy — a coarse-grained qubit-array mapper using MAX k-Cut to maximize inter-array gates, and a fine-grained qubit-atom mapper for load balancing and parallelism.
3. Designing a high-parallelism router that schedules atom movements and 2Q gate executions while respecting hardware constraints like no atom overlap.
4. Evaluating fault-tolerant quantum computing on FPQA using surface codes, analyzing logical error rates, resource requirements, and bandwidth needs.
5. Comprehensive evaluation showing FPQA-C outperforms superconducting, fixed atom array baselines and other FPQA compilers in terms of gate count, depth, fidelity and compilation time across diverse benchmarks.
6. Analysis on the impact of circuit characteristics, hardware parameters, and architectural configurations on FPQA’s performance.
The paper positions FPQA as a promising quantum architecture and provides an efficient, scalable compilation framework tailored to leverage its reconfigurable qubit connectivity.
Neutral atom arrays have become a promising platform for quantum computing, especially the field programmable qubit array (FPQA) endowed with the unique capability of atom movement. This feature allows dynamic alterations in qubit connectivity during runtime, which can reduce the cost of executing long-range gates and improve parallelism. However, this added flexibility introduces new challenges in circuit compilation. Inspired by the placement and routing strategies for FPGAs, we propose to map all data qubits to fixed atoms while utilizing movable atoms to route for 2-qubit gates between data qubits. Coined flying ancillas, these mobile atoms function as ancilla qubits, dynamically generated and recycled during execution. We present Q-Pilot, a scalable compiler for FPQA employing flying ancillas to maximize circuit parallelism. For two important quantum applications, quantum simulation and the Quantum Approximate Optimization Algorithm (QAOA), we devise domainspecific routing strategies. In comparison to alternative technologies such as superconducting devices or fixed atom arrays, Q-Pilot effectively harnesses the flexibility of FPQA, achieving reductions of 1.4×, 27.7×, and 6.3× in circuit depth for 100-qubit random, quantum simulation, and QAOA circuits, respectively
The article discusses the Japanese government’s Moonshot program, which aims to develop fault-tolerant universal quantum computers by 2050. It highlights the challenges involved, such as dealing with the loss of “quantumness” in qubits due to interactions with the environment. The program brings together researchers from various fields, including theoreticians, experimentalists, engineers, and programmers, to tackle different aspects of quantum computer development.
One key focus is developing an overarching computer architecture that can handle errors and achieve fault tolerance, which may require a million or more qubits. However, theoretical research suggests that an intermediate stage with 10,000 qubits, called an “early fault-tolerant quantum computer,” could outperform current noisy quantum computers.
The program utilizes a cross-layer co-design model that treats each component (qubits, control systems, error correction, etc.) as different layers, allowing researchers to understand how their work impacts the overall system. Efforts are underway to develop quantum error-correction systems using programmable VLSI circuits (FPGAs) and demonstrate fault tolerance with superconducting qubits.
The article emphasizes the importance of developing fault-tolerant quantum computers, as they could enable simulations of chemical reactions and molecules, potentially leading to breakthroughs in areas like artificial photosynthesis, nitrogen fixation, and drug discovery.
A new implementation of many-body calculations is of paramount importance in the field of computational physics. In this study, we leverage the capabilities of Field Programmable Gate Arrays (FPGAs) for conducting quantum many-body calculations. Through the design of appropriate schemes for Monte Carlo and tensor network methods, we effectively utilize the parallel processing capabilities provided by FPGAs. This has resulted in a remarkable tenfold speedup compared to CPU-based computation for a Monte Carlo algorithm. We also demonstrate, for the first time, the utilization of FPGA to accelerate a typical tensor network algorithm. Our findings unambiguously highlight the significant advantages of hardware implementation and pave the way for novel approaches to many-body calculations.
We introduce the Piquasso quantum programming framework, a full-stack open-source software platform for the simulation and programming of photonic quantum computers. Piquasso can be programmed via a high-level Python programming interface enabling users to perform efficient quantum computing with discrete and continuous variables. Via optional high-performance C++ backends, Piquasso provides state-of-the-art performance in the simulation of photonic quantum computers. The Piquasso framework is supported by an intuitive web-based graphical user interface where the users can design quantum circuits, run computations, and visualize the results
We present PyRPL, an open source software package that allows the implementation of automatic digital feedback controllers for quantum optics experiments on commercially available, affordable FPGA boards. Our software implements the digital generation of various types of error signals, from an analog input through the application of loop filters of high complexity and real-time gain adjustment for multiple analog output signals, including different algorithms for resonance search, lock acquisition sequences and in-loop gain optimization. Furthermore, all necessary diagnostic instruments such as an oscilloscope, a network analyzer and a spectrum analyzer are integrated into our software. Apart from providing a quickly scalable, automatic feedback controller, the lock performance that can be achieved by using PyRPL with imperfect equipment such as piezoelectric transducers and noisy amplifiers is better than the one achievable with standard analog controllers due to the higher complexity of implementable filters and possibilities of nonlinear operations in the FPGA. This drastically reduces the cost of added complexity when introducing additional feedback loops to an experiment. The open-source character also distinguishes PyRPL from commercial solutions, as it allows users to customize functionalities at various levels, ranging from the easy integration of PyRPL-based feedback controllers into existing setups to the modification of the FPGA functionality. A community of developers provides fast and efficient implementation and testing of software modifications.
This work explores avenues and target areas for optimizing FPGA-based control hardware for experiments conducted on superconducting quantum computing systems and serves as an introduction to some of the current research at the intersection of classical and quantum computing hardware. With the promise of building larger-scale error-corrected quantum computers based on superconducting qubit architecture, innovations to room-temperature control electronics are needed to bring these quantum realizations to fruition. The QICK (Quantum Instrumentation Control Kit) is one leading experimental FPGA-based implementations. However, its integration into other experimental quantum computing architectures, especially those using superconducting radiofrequency (SRF) cavities, is largely unexplored. We identify some key target areas for optimizing control electronics for superconducting qubit architectures and provide some preliminary results to the resolution of a control pulse waveform. With optimizations targeted at 3D superconducting qubit setups, we hope to bring to light some of the requirements in classical computational methodologies to bring out the full potential of this quantum computing architecture, and to convey the excitement of progress in this research.
Field-Programmable Gate Arrays (FPGAs) have asserted themselves as vital assets in contemporary computing by offering adaptable, reconfigurable hardware platforms. FPGA-based accelerators incubate opportunities for breakthroughs in areas, such as real-time data processing, machine learning or cryptography — to mention just a few. The procedure of placement — determining the optimal spatial arrangement of functional blocks on an FPGA to minimize communication delays and enhance performance — is an NP-hard problem, notably requiring sophisticated algorithms for proficient solutions. Clearly, improving the placement leads to a decreased resource utilization during the implementation phase. Adiabatic quantum computing (AQC), with its capability to traverse expansive solution spaces, has potential for addressing such combinatorial problems. In this paper, we re-formulate the placement problem as a series of so called quadratic unconstrained binary optimization (Qubo) problems which are subsequently solved via AQC. Our novel formulation facilitates a straight-forward integration of design constraints. Moreover, the size of the sub-problems can be conveniently adapted to the available hardware capabilities. Beside the sole proposal of a novel method, we ask whether contemporary quantum hardware is resilient enough to find placements for real-world-sized FPGAs. A numerical evaluation on a D-Wave Advantage 5.4 quantum annealer suggests that the answer is in the affirmative.
A fault-tolerant quantum computer must decode and correct errors faster than they appear. The faster errors can be corrected, the more time the computer can do useful work. The Union-Find (UF) decoder is promising with an average time complexity slightly higher than O(d 3 ). We report a distributed version of the UF decoder that exploits parallel computing resources for further speedup. Using an FPGA-based implementation, we empirically show that this distributed UF decoder has a sublinear average time complexity with regard to d, given O(d 3 ) parallel computing resources. The decoding time per measurement round decreases as d increases, a first time for a quantum error decoder. The implementation employs a scalable architecture called Helios that organizes parallel computing resources into a hybrid tree-grid structure. We are able to implement d up to 21 with a Xilinx VCU129 FPGA, for which an average decoding time is 11.5 ns per measurement round under phenomenological noise of 0.1%, significantly faster than any existing decoder implementation. Since the decoding time per measurement round of Helios decreases with d, Helios can decode a surface code of arbitrarily large d without a growing backlog
A Quantum FPGA (QFPGA) architecture is presented for programmable quantum computing, which is a hybrid architecture combining the advantages of the measurement-based quantum computation and the qubus system. QFPGA consists of Quantum Logic Blocks (QLBs) and Quantum Routing Channels (QRCs). The QLB is used to realize a small quantum logic while the QRC is to combine them properly for larger logic realization. There are two types of buses in QFPGA, the local bus in the QLB and the global bus in the QRC, which are to generate the cluster states and general multiqubit rotations around the z axis respectively. However for some applications such as Grover’s algorithm and n-qubit quantum Fourier transform, one QLB can be configured for four-qubit phase shift module and four-qubit quantum Fourier transform respectively.
QNNs
Quantum neural networks are computational neural network models which are based on the principles of quantum mechanics. The first ideas on quantum neural computation were published independently in 1995 by Subhash Kak and Ron Chrisley,[1][2] engaging with the theory of quantum mind, which posits that quantum effects play a role in cognitive function. However, typical research in quantum neural networks involves combining classical artificial neural network models (which are widely used in machine learning for the important task of pattern recognition) with the advantages of quantum information in order to develop more efficient algorithms.[3][4][5] One important motivation for these investigations is the difficulty to train classical neural networks, especially in big data applications. The hope is that features of quantum computing such as quantum parallelism or the effects of interference and entanglement can be used as resources. Since the technological implementation of a quantum computer is still in a premature stage, such quantum neural network models are mostly theoretical proposals that await their full implementation in physical experiments.
